Logic design and architecture page-complete index
Binary numbers and codes
PAGE 1..Basic binary numbers.
PAGE 2...Base 10 conversion.
PAGE 3...Conversion to base 10 from binary.
PAGE 4...How the computer converts.
PAGE 5...Codes: numbers, BCD, text, raster graphics.
PAGE 6...Codes: PCM audio, computer instruction codes.
Boolean algebra
PAGE 7 ...AND OR NOT and basic postulates
PAGE 8 ...Useful theorems
PAGE 9 ...Ex of algebraic minimization and gate representations
PAGE 10 ...How the functions derived from physical switches
PAGE 11 ...Example of electromagnetic relay; function tracing
PAGE 12 ...Examples of function evaluation by tracing
PAGE 13 ...Algebraic simplification-more examples
PAGE 14 ...Complements
PAGE 15 ...Canonical forms-sum of products (SOP)
PAGE 16 ...Further background for Page 15 above
PAGE 17 ...Table of all 16 2-input functions
PAGE 18 ...Hardware effect of associativity and commutativity
PAGE 19 ...NAND and NOR and associativity
PAGE 20 ...Active HIGH and active LOW ("positive" and "negative" (ugh) logic)
PAGE 21 ...De Morgan gate equivalences; logic levels
Karnaugh Maps
PAGE 22 ...Introduction
PAGE 23 ...K-map for 3 variables
PAGE 24 ...More examples
PAGE 25 ...K map for 4 variables
PAGE 26 ...Examples; complements
PAGE 27 ...K-map complements
Karnaugh Maps and other function implementations
PAGE 28 ...AND-OR and NAND implementations
PAGE 29 ...OR-AND and NOR implementation
PAGE 30 ...OR-NAND and NOR-OR and AND-NOR and NAND-AND. Don't care terms
PAGE 31 ...Don't care terms-example K map
Karnaugh Maps-function implementation examples
PAGE 32 ...Arbitrary 4-variable functions
PAGE 33 ...7 segment decoder
PAGE 34 ...Boolean algebra NAND and NOR examples
PAGE 35 ...Arbitrary Function
PAGE 36 ...A 9-input function
PAGE 37 ...Analyze circuit to obtain truth table
PAGE 38 ...Minimized circuit to add 9 to a 4-bit number
PAGE 39 ...Algebraic simplification examples
Miscellaneous introductory topics
PAGE 40 ...Cookbood NAND implementation
PAGE 41 ...NOR implementation and algebraic method.
PAGE 42 ...Fan in and fan out
PAGE 43 ...Multilevel implementation; factoring
PAGE 44 ...Multilevel implementation from Hayes text
PAGE 45 ...XOR and Equivalence properties
PAGE 46 ...XOR and Equivalence continued
PAGE 47 ...8-input XOR from Hayes text
MSI Combinational Logic
PAGE 48 ...Introduction
PAGE 49 ...Addition-intro
PAGE 50 ...Full adder
PAGE 51 ...Use of 4 bit adder and Lookahead carry
PAGE 52 ...Lookahead carry 4-bit adder
PAGE 53 ...Lookahead carry diagram from Mano
PAGE 54 ...Lookahead carry diagram from Hayes
PAGE 55 ...BCD adder
PAGE 56 ...Comparator
PAGE 57 ...Binary decoder
PAGE 58 ...Expansion of binary decoders
PAGE 59 ...Encoder
PAGE 60 ...Multiplexer and function implementation
PAGE 61 ...Function implementation with MUX
PAGE 62 ...ROM
PAGE 63 ...ROM to implement an ALU
Intro to Sequential Logic
PAGE 64 ...Basic terms
PAGE 65 ...Basic NOR storage element
PAGE 66 ...RS Latch
PAGE 67 ...D Latch
PAGE 68 ...JK flip flop
PAGE 69 ...Clock signals and master-slave flip flop
PAGE 70 ...Edge-triggered flip flop
PAGE 71 ...7474 type flip flops
Intro to sequential analysis and synthesis
PAGE 72 ...Excitation tables
PAGE 73 ...An example circuit
PAGE 74 ...State diagrams
PAGE 75 ...Synthesis using excitation table method
PAGE 76 ...Derivation of steering functions
PAGE 77 ...State diagram simplification
PAGE 78 ...State diagram simplification continued
PAGE 79 ...Example-synthesis
PAGE 80 ...Example page 2
PAGE 81 ...Example Page 3
PAGE 82 ...Example-state diagram
PAGE 83 ...Counters
PAGE 84 ...Design of a counter
PAGE 85 ...Counter example-steering functions
PAGE 86 ...Async circuits and timing diagrams
PAGE 87 ...Timing analysis of synchronous circuit
PAGE 88 ...Hazards and ripple counter example
PAGE 89 ...Multiphase clocking
PAGE 90 ...Signal electrical quality
MSI sequential Logic
PAGE 91 ...Basic registers
PAGE 92 ...Serial and parallel data
PAGE 93 ...The PC LPT port
PAGE 94 ...Serial data port
PAGE 95 ...Synchronous D register
PAGE 96 ...Universal shift register
PAGE 97 ...Use of a 4 bit sync counter
PAGE 98 ...Basic binary sync counter
PAGE 99 ...4 bit binary counter from Mano
PAGE 100 ...Serial adder
Introduction to architecture
PAGE 101 ...Synchronous data transfer
PAGE 102 ...Bus system for 4 registers (Mano)
PAGE 103 ...Simple-minded ALU with register file
PAGE 104 ...Two-bus ALU (Mano)
PAGE 105 ...Practical SRAM and timing diagram
PAGE 106 ...SRAM expansion
PAGE 107 ...Microprocessor - 1
PAGE 108 ...Microprocessor - 2
PAGE 109 ...Simple microprocessor system
PAGE 110 ...Parallel port device
PAGE 111 ...Address decoding chart
PAGE 112 ...Microcomputer system design - 1
PAGE 113 ...Microcomputer system design - 2
PAGE 114 ...Microcomputer system design - 3
PAGE 115 ...Microcomputer system design - 4
PAGE 116 ...Microcomputer system design - 5
PAGE 117 ...Microcomputer system design - 6
PAGE 118 ...Direct Memory Access (DMA)
